In many industrial systems, such as computer and telecommunications systems, there is a need for making a large number of electrical interconnections between a plurality of points of interest. It is generally desirable to achieve reliable connections (i.e. with low connection failure rates), with good electrical properties, and to be able to dispose such connections within a small area to address space limitations. Various prior art approaches have been attempted which experience limitations in one or more of the above-mentioned characteristics.
One prior art approach is that of Printed Wire Board (PWB) flex circuits. PWB flex circuits are generally easy to manufacture if they have wide lines and traces. However, such circuits are generally difficult to manufacture in volume when fine lines, high density, and/or tight impedance controls are required. Moreover, if tight impedance controls are required, yield losses are generally high in volume production due primarily to variations in the etch processes.
FIG. 1 is a section view of a strip line flex circuit 100 for high speed high density applications according to a prior art solution. Conductive traces 102 are shown with a dashed line. Ground planes 101 and 103 are shown running parallel to traces 102.
FIG. 2 is a top view of a center line cross-section of the strip line flex circuit depicted in FIG. 1. A number 200 of parallel traces 201 may be seen in the top view of FIG. 2. Generally, the width of and spacing between traces 201 may be important features in determining electrical properties of the structure such as characteristic impedance, resistance, skin effect losses, and crosstalk between the traces.
FIG. 3 depicts sectional views 300 of four possible conductive trace geometries. The three columns separated by ideal spaces 306 are generally equivalent. Accordingly, the four trace geometries depicted in the rightmost column 301 will be discussed herein. Trace 302 generally represents an ideal trace geometry, which although highly desirable, is very difficult to achieve in a typical etch process. Trace 303 generally represents a desirable trace geometry which may be achieved with careful process control and with some yield loss. Trace 304 depicts a trace from which an excessive amount of conductive material, such as copper, has been removed. Trace 304 will generally experience excessive direct current (d.c.) resistance, increased skin effect losses, and undesirably high characteristic impedance. Element 305 depicts an under-etched trace. Such an under-etched trace will generally have excessive crosstalk and lower than ideal characteristic impedance.
High speed data cables have been employed to provide interconnection having superior electrical signal characteristics. However, the use of such cabling is generally more expensive to implement for transmission of a given set of signals than is printed wire board flex circuit. Moreover, connectors used to connect such data cables to a board generally provide lower signal density than do flex circuits. Furthermore, such cable connectors are commonly the cause of impedance mismatches, crosstalk, and skew.
In certain cases, multiple rigid PCBs (printed circuit boards) are used to establish electrical connections to system or subsystem units which are not on the same plane. As a result, multiple connectors may be introduced into the signal path, the addition of which generally degrades the quality of signal transmission. In addition, implementing a plurality of rigid PCBs generally adds to system cost, and takes up additional space.
FIG. 4A is a section view 400 of a via connected to a wire according to a prior art multiwire connection arrangement. Employing this arrangement, via 401 is generally formed onto the end of wire 402. Wire 402 may be coated with TEFLON® (polytetrafluoroethylene) for insulation purposes. In a connection employing the arrangement depicted in FIG. 4A, the available area for establishing a connection between wire 402 and via 401 is generally limited to the cross-sectional area of wire 402. Some additional contact area may become available where the polytetrafluoroethylene coating is etched back for a finite distance along wire 402 from the outside diameter of via 401. FIG. 4B is a top view of the same connection.
Although the embodiment depicted in FIGS. 4A and 4B generally provides the superior electrical properties of discrete wiring, the attachment of wire 402 to via 401 provides a weak mechanical connection between wire 402 and via 401 which is subject to failure if wire 402 is pulled or moved in any direction.
FIG. 5A is a section view 500 of a via 501 connected to a trace 502 in a printed circuit board arrangement. Employing this arrangement, a hole is drilled in a conductive pad connected to trace 502, and plating material added to create via 501. FIG. 5B is a top view of the connection depicted in FIG. 5A. This connection generally provides for a 360 degree connection between plating on via 501 and the copper of trace 502. This trace-via connection offers a more robust mechanical connection than the connection between the discrete wire and via depicted in FIG. 4. However, the trace-via connection of FIG. 5 is subject to the inconsistency in dimensional tolerance and electrical properties discussed in connection with FIG. 3.
FIG. 6 is a section view of a rigid circuit employing discrete wiring 602 between stripline shield layers 601 according to a prior art embodiment. FIG. 7 is a top view 700 of a center line cross-section of wires 602 depicted in FIG. 6. Returning to FIG. 6, generally, the cross sectional area between stripline shield layers 601 is filled with rigid dielectric material 603, such as FR4 or G-Tec. The rigid circuit embodiment of FIG. 6 benefits from the advantageous electrical performance properties of discrete wiring. However, the embodiment employs the mechanically vulnerable wire to via connection discussed in connection with FIG. 4A.
Accordingly, it is a problem in the art that PWB flex circuits are difficult to manufacture in high volume and experience and high yield losses due to etch variations.
It is a further problem in the art that it is difficult to generate consistent trace geometries, resulting in inconsistent electrical properties for conductive traces.
It is a still further problem in the art that cables are generally more expensive to implement than flex circuits for the same number of signals.
It is a still further problem in the art that connectors used to attach cables to boards offer lower signal density than PWB flex circuits, and commonly cause impedance mismatches, crosstalk, and skew.
It is a still further problem in the art that the deployment of multiple PCBs cause added cost, take up additional space, and cause degraded performance because of the implementation of multiple connectors along individual signal paths.
It is a still further problem in the art that the connection of discrete wires to plated vias generally mechanically weak and subject to failure when the wire is pulled or moved.